For sure, I very much expect a lot of RISCV based designs on the market in the near future. This also opens up possibility for doing SoC style architecture like Apple M series. Moving away from the legacy x86 design creates a lot of possibilities for performance and power usage improvements.
NASA recently standardized on RISC-V for future space-based computers.. The idea is to have a standardized CPU that’s radiation-hardened, has a minimal power draw when inactive, but has the computing power necessary to handle high-performance operations with reliability at critical times (course corrections, landing sequences, command-and-control of sensors when doing rapid flybys, etc). And they want to be able to use multiple CPU vendors without having to make hardware or software redesigns of their own.
For sure, I very much expect a lot of RISCV based designs on the market in the near future. This also opens up possibility for doing SoC style architecture like Apple M series. Moving away from the legacy x86 design creates a lot of possibilities for performance and power usage improvements.
NASA recently standardized on RISC-V for future space-based computers.. The idea is to have a standardized CPU that’s radiation-hardened, has a minimal power draw when inactive, but has the computing power necessary to handle high-performance operations with reliability at critical times (course corrections, landing sequences, command-and-control of sensors when doing rapid flybys, etc). And they want to be able to use multiple CPU vendors without having to make hardware or software redesigns of their own.
That’s pretty awesome.