- cross-posted to:
- technology@hexbear.net
- technology@lemmygrad.ml
- riscv
- cross-posted to:
- technology@hexbear.net
- technology@lemmygrad.ml
- riscv
cross-posted from: https://lemmy.ml/post/24503345
A team from China’s top government research academy pledged to produce this year a processor based on the open-source chip-design architecture RISC-V, as Beijing advances its semiconductor self-reliance drive amid escalating US restrictions.
The Chinese Academy of Sciences (CAS) will be able to deliver its XiangShan open-source central processing unit in 2025, wrote Bao Yungang, deputy director at the academy’s Institute of Computing Technology, in a Weibo post on Sunday.
Sounds very interesting. Im not sure how open it will actually be, if they just mean its using RISC-V’s open design and its just lost in translation or if they are actually trying to make an open hardware ecosystem.
edit: I read a bit more, it seems to be a apache-like licensed software only processor that one needs to implement first, so basically something inbetween pre RISC-V and an actual chip. Still cool, but I was hoping it was a finished chip.
The processor definition is in Scala using Chisel. This produces an HDL (what’s needed for actual hardware) using a typed embedded domain specific language. This also compiles to a software model for validation. But that’s not the same as “software only”
No no, this is actually open source. Not just the ISA, but also the silicon.
https://github.com/OpenXiangShan/XiangShan