RISC-V
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Raspberry Pi Zero vs MangoPi MQ Pro Benchmarks
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Raspberry Pi Zero vs MangoPi MQ Pro Benchmarks
Star64, a RISC-V SOC from Pine64
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third chapter of the July Update blogpost
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Star64, a RISC-V SOC from Pine64
RISC-V only takes 12 years to achieve the milestone of 10 billion cores, 5 years faster than ARM.
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RISC-V only takes 12 years to achieve the milestone of 10 billion cores, 5 years faster than ARM.
A year of RISC-V adventures: embracing chaos in your software journey
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A year of RISC-V adventures: embracing chaos in your software journey
There is a RISC-V laptop on the way!
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Specs look good. I wonder which distros will support RISC-V now?
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There is a RISC-V laptop on the way!
Pine64 is working on a RISC-V board!
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This is great for moving RISC-V to mainstream. Pine64 makes great hardware.
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Pine64 is working on a RISC-V board!
A RISC-V laptop or mini PC with Rockchip RK3588-class performance may be coming soon
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A RISC-V laptop or mini PC with Rockchip RK3588-class performance may be coming soon
Debian running on the RISC-V board 😁
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Debian running on the RISC-V board 😁
Just received my first tiny RISC-V computer
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cross-posted from: https://lemmy.ml/post/299185 > two usb C ports on the top left for scale, currently trying to figure out how to build a linux image for it 🤷‍♀️
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Just received my first tiny RISC-V computer
GitHub - risc0/risc0: RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.
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GitHub - risc0/risc0: RISC Zero is a zero-knowledge verifiable general computing platform based on zk-STARKs and the RISC-V microarchitecture.
Explaining RISC-V: An x86 & ARM Alternative
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Explaining RISC-V: An x86 & ARM Alternative
"RISC-V is trying to launch an open-hardware revolution" (2020 video from Engadget's Upscaled)
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cross-posted from: https://lemmy.ml/post/67536
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"RISC-V is trying to launch an open-hardware revolution" (2020 video from Engadget's Upscaled)
Introduction to RISC V and Assembly Language for Beginners (15 minute video)
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Introduction to RISC V and Assembly Language for Beginners (15 minute video)
Nezha RISC-V Linux SBC
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Nezha RISC-V Linux SBC
VisionFive RISC-V Linux SBC
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VisionFive RISC-V Linux SBC
SiFive bags $175m to further challenge Arm with RISC-V
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SiFive bags $175m to further challenge Arm with RISC-V
Why RISC-V Is Succeeding
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Why RISC-V Is Succeeding
Intel makes deep investment in RISC-V community
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Intel makes deep investment in RISC-V community
Edge AI on Low-Footprint RISC-V | Alexander Stanitzki, Fraunhofer IMS
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Edge AI on Low-Footprint RISC-V | Alexander Stanitzki, Fraunhofer IMS
Future Corporation Partners with AB Open for Unique RISC-V PC Project - AB Open
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[reddit](https://teddit.net/r/RISCV/comments/rt3wc3/future_corporation_partners_with_ab_open_for)
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Future Corporation Partners with AB Open for Unique RISC-V PC Project - AB Open
RISC-V
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    RISC-V (pronounced “risk-five”) is a license-free, modular, extensible instruction set architecture (ISA).

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