Basically more everything. 2x Cortex M33 cores with floating point, 520KB ram, more PIOs, bunch of secure boot stuff (I have mixed feelings about this), and can boot to a mode with risc-v cores instead of the M33s.
Basically more everything. 2x Cortex M33 cores with floating point, 520KB ram, more PIOs, bunch of secure boot stuff (I have mixed feelings about this), and can boot to a mode with risc-v cores instead of the M33s.
Better marketing. It’s also easier to get a build pipeline for ARM than Xtensa and RISC-V.